Books

Book and Chapter Publications

  1. Muhannad S. Bakir and Suresh K. Sitaraman, Volume 3: Flexible Chip I/O Interconnects, Set 1: Interconnect and Wafer Bonding Technology, Encyclopedia of Packaging Materials, Processes, and Mechanics, Oct. 2019, World Scientific Publishing. view
  2. Chung, P. Y., Chen, W., and Sitaraman, S. K., “Design, Fabrication, and Assembly of 3-Arc-Fan Compliant Interconnects,” Chapter 1, Volume 3: Flexible Chip I/O Interconnects, Set 1: Interconnect and Wafer Bonding Technology, Encyclopedia of Packaging Materials, Processes, and Mechanics, Oct. 2019, World Scientific Publishing. view
  3. Chen, W., Chung, P. Y., and Sitaraman, S. K., “Mechanical Reliability Assessment of 3-Arc-Fan Compliant Interconnects,” Chapter 2, Volume 3: Flexible Chip I/O Interconnects, Set 1: Interconnect and Wafer Bonding Technology, Encyclopedia of Packaging Materials, Processes, and Mechanics, Oct. 2019, World Scientific Publishing. view
  4. Ma, L., Sitaraman, S. K., Zhu, Q., Klein, K., and Fork, D., “Design and Development of Stress-Engineered Compliant Interconnect in Microelectronic Packaging,” Chapter 28, Nanopackaging: Nanotechnologies and Electronics Packaging, Second Edition, Ed. James E. Morris, Springer, 2018. view
  5. Sitaraman, S. K. and Kacker, K., “Mechanically Compliant I/O Interconnects and Packaging,” Chapter 3, Integrated Interconnect Technologies for 3D Nanoelectronic Systems, Ed. Muhannad S. Bakir and James D. Meindl, Artech House, 2009. view
  6. Ma, L., Sitaraman, S. K., Zhu, Q., Klein, K., and Fork, D., “Design and Development of Stress-Engineered Compliant Interconnect in Microelectronic Packaging,” Chapter 21, Nanopackaging: Nanotechnologies and Electronics Packaging, Ed. James E. Morris and Debendra Malik, Springer, 2008. view
  7. Perkins, A. E. and Sitaraman, S. K., Solder Joint Reliability Prediction for Multiple Environments, Springer, ISBN 978-0-387-79393-1, 2008. view
  8. Pucha, R. V., Qu, J.,and Sitaraman, S. K., “Mixed Signal Package Reliability,” Chapter 8, Introduction to System on Package (SOP), R. R. Tummala and M. Swaminathan, McGraw-Hill, 2008. view
  9. Sitaraman, S. K. and Kacker, K., “Thermo-Mechanical Reliability Prediction for Lead-Free Solder Interconnects,” Chapter 8, Lead-Free Solder Interconnect Reliability, Ed. D. Shangguan, EDFAS (Electronic Device Failure Analysis Society) and ASM International, 2005. view
  10. Zheng, J. and Sitaraman, S. K., “Development of Single-Strip Decohesion Test to Measure Interfacial Fracture Toughness,” pp. 226-235, The World of Electronic Packaging and System Integration, Ed. B. Michel and R. Aschenbrenner, ddp goldenbogen, 2004. view
  11. Ume, I. C., Lau, J., Suhir, E., Kowalski, G., Sitaraman, S., Ramakrishna, K., Sammakia, K., and Kao, I. (editors), Packaging, Reliability, and Manufacturing Issues Associated with Electronic and Photonic Products, EPP-Vol. 1, ASME, 2001. view
  12. Sitaraman, S. K. and Pang, J., “Fundamentals of Design for Reliability,” Chapter 5, Fundamentals of Microsystems Packaging, R. Tummala, McGraw-Hill, 2001. view
  13. Ahmad, M. and Sitaraman, S. K., “Coupled Thermal Electric Modeling of Flexible Micro-Spring Interconnects for High Performance Probing,” 51st Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2001, pp. 721-729. view
  14. Srivatson, T. S., Jones, W., Zavaliangas, A., Ramani, K., Jacob, K. I., Sitaraman, S. K., Katsube, N., and Yang, S.(editors), Composites and Functionally Graded Materials, MD-Vol. 80, ASME 1997. view