Methodology for Modeling Substrate Warpage Using Copper Trace Pattern Implementation

Submitted by Caspar_admin on Mon, 11/04/2013 - 18:37
Citation: 
McCaslin, L., Yoon, S., Kim, H., and Sitaraman, S. K., “Methodology for Modeling Substrate Warpage Using Copper Trace Pattern Implementation," IEEE Transactions on Advanced Packaging, Vol. 32, No. 4, Nov. 2009, pp. 740-745. Also, McCaslin, L. and Sitaraman, S. K., “Methodology for Modeling Substrate Warpage Using Copper Trace Pattern Implementation,” 58th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2008, pp. 1582-1586.